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MRF89XA
2.4.4
IF GAIN AND SECOND I/Q MIXER
2.5
Frequency Synthesizer Block
Following the LNA and first down-conversion, there is
an IF amplifier whose gain can be programmed from
13.5-0 dB in 4.5 dB steps, through the register
DMODREG. For more information, refer to
Section 2.14.2, DATA AND MODULATION
CONFIGURATION REGISTER DETAILS . The default
setting corresponds to 0 dB gain, but lower values can
be used to increase the RSSI dynamic range.
2.4.5 CHANNEL FILTERS
The second mixer stages are followed by the channel
select filters. The channel select filters have a strong
influence on the noise bandwidth and selectivity of the
receiver and therefore, its sensitivity. Each channel
select filter features a passive second-order RC filter,
with a programmable bandwidth and the “fine” channel
selection is performed by an active, third-order,
Butterworth filter, which acts as a low-pass filter for the
zero-IF configuration (FSK), or a complex polyphase
filter for the low-IF (OOK) configuration. For more
information on configuring passive and active filters
see Section 3.4.4, Channel Filters .
The frequency synthesizer of the MRF89XA is a fully
integrated integer-N type PLL. The crystal oscillator
provides the reference frequency for the PLL. The PLL
circuit requires only a minimum of five external
components for the PLL loop filter and the VCO tank
circuit.
Figure 2-4 illustrates a block schematic of the
MRF89XA PLL. Here the crystal reference frequency
and the software controlled dividers R, P and S blocks
determine the output frequency of the PLL.
The VCO tank inductors are connected on an external
differential input. Similarly, the loop filter is also located
externally.
FIGURE 2-4:
MRF89XA
XO
FREQUENCY SYNTHESIZER BLOCK DIAGRAM
÷ 75 * (Pi + 1) + Si
PFD
÷ (Ri + 1)
LO
F COMP
Vtune
OSC1
OSC2
PLLP
PLLN
VCOTP
VCOTN
VCORS
2.5.1
REFERENCE OSCILLATOR PINS
Choosing a higher tolerance crystal results in a lower
(OSC1/OSC2)
The MRF89XA has an internal, integrated oscillator
circuit and the OSC1 and OSC2 pins are used to
connect to an external crystal resonator. The crystal
oscillator provides the reference frequency for the PLL.
The crystal oscillator circuit, with the required loading
TX to RX frequency offset and the ability to select a
smaller deviation in baseband bandwidth. Therefore,
the recommended crystal accuracy should be ≤ 40
ppm. The guidelines for selecting the appropriate
crystal with specifications are explained in Section 4.6,
Crystal Specification and Selection Guidelines .
capacitors, provides a 12.8 MHz reference signal for
the PLL. The PLL then generates the local oscillator
frequency. It is possible to “pull” the crystal to the
accurate frequency by changing the load capacitor
value. The crystal oscillator load capacitance is
typically 15 pF, which allows the crystal oscillator circuit
to accept a wide range of crystals.
Note:
Crystal frequency error will directly trans-
late to carrier frequency (f rf ), bit rate and
frequency deviation error.
DS70622C-page 16
Preliminary
? 2010–2011 Microchip Technology Inc.
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